Experience on high performance cores would be a plus. Good understanding of advanced node technologies (7nm, 5nm, 3nm).3+ years of RTL2GDS flow experience in EDA/IC Design.
BS/MS in Electrical Engineering, Computer Engineering, or related discipline.Engaging with early new node customers and supporting the deployment of latest technologies.Pathfinding: Hands-on analysis on engine issues and providing quick solutions (usually TCL/Perl prototypes) to show that EDA engines can be extended to meet the Foundry/customer's needs.Working closely with the R&D and Foundry Partners on bleeding edge of technology, and help enhance EDA engines for improved PPA in Fusion Compiler/ICC2.We are seeking someone who will be able to connect the dots between the customer's design needs, PPA closure, and the underlying capabilities of the EDA engines. This is an individual contributor role, where you would be working very closely with R&D and Foundry Partners, and should be able to isolate potential issues to help enhance the algorithms to greatly improve PPA and Runtime for the customer's specific designs.
You will be a member of the Advanced Node Methodology Pathfinding team which is responsible for rapid (Power, Performance, Area) PPA closure on high-performance designs, using Fusion Compiler/IC Compiler II.